A phase-locked loop (PLL) is an electronic circuit that adjusts the frequency of a feedback clock signal based on the frequency of an input reference clock signal. Phase-locked loops (PLLs) are in many integrated circuits, providing periodic signals for data recovery, data transfer, and other clocking functions. PLLs often supply a clock signal generated by an oscillator to one or more counters or dividers that divide the clock signal to a lower frequency clock signal for distribution around an integrated circuit or system.